FIG. 1 shows a data transmission memory according to the prior art. This conventional data transmission memory serves for data transmission between various subscribers T1–T8. The data transmission memory is, for example, a SRAM, which is relatively slow on account of its size. The data transmission memory is connected to the subscribers T1–T8 via data buses. The data transmission memory is in this case either integrated in an independent bus switching device or itself forms part of a subscriber T. Each of the subscribers T1–T8 represented in FIG. 1 may, however, likewise have a corresponding data transmission memory as a link with further subscribers T. The data transmission memory contains a memory controller, which is connected to a data memory via internal data and control lines. The data memory integrated in the data transmission memory is a RAM, which is subdivided into various memory areas or buffer 1 to buffer 8. The number of memory areas of the data memory corresponds to the number of subscribers T1–T8 connected to the data transmission memory. In this case, the size of the memory areas, i.e. buffer 1 to buffer 8, is the same in each case. A buffer memory i serves in this case for the transmission of data packets to the destination subscriber Ti. The data buses are, for example, Ethernet data buses. In the data transmission memory, all the input data packets intended for a specific subscriber Ti are buffer-stored in the associated buffer memory i, combined to form an output data packet and sent to the destination subscriber Ti via the output data bus.
The customary data transmission memory represented in FIG. 1 has a number of considerable disadvantages. If, in a special situation of the overall system, a destination subscriber receives a large number of data packets from other subscribers, it may happen that the buffer memory i allocated to said subscriber within the data memory overflows and consequently none of its own data packets can be stored any longer in the buffer memory i. In this case, the overflowing of the corresponding buffer memory is detected by the memory controller, the data transmission is stopped and the entire system is initialized. This takes place even if there is still sufficient memory space available in the other buffer memories of the other subscribers T for receiving reception data packets. Since each subscriber is allocated an independent buffer memory area in a fixed way, the conventional data transmission memory according to the prior art, represented in FIG. 1, cannot respond flexibly to an overflow of the buffer memory, for example by making memory space available in the other, unused buffer memories. The conventional data transmission memory according to the prior art consequently responds inflexibly to load peaks affecting specific destination subscribers and is very slow.
A further disadvantage of the data transmission memory according to the prior art represented in FIG. 1 is that the data memory is utilized relatively poorly. In many situations, there happen to be only few subscribers T of the overall system communicating with one another via the data buses. It is accordingly also the case that only the buffer memory areas of these subscribers within the data memory are being used, while the other buffer memories of the other subscribers within the data memory are not being accessed at all or, only to a very small extent. If, for example, only the subscriber T1 and the subscriber T8 are exchanging data packets with each other via the data buses, only the buffer memory 1 and the buffer memory 8 are being used within the data memory, so that the maximum utilization of the data memory in this situation is at most 25%.